System/1 Build Log

An ongoing chronology of System/1's construction, and any other related musings.

15th May, 2016 - In which an idea is obvious, in retrospect.

This entry was backdated.

In addition to register I/O facilities, the front panel also needs to provide various associated controls and indicators. Indicators are simple enough to add — simply hanging LEDs off the appropriate internal signals suffices in most cases — but controls such as the run/halt switches need suitable interfacing between the mechanical and electronic realms alongside their actual implementations.

To derive nice clean logic signals from bouncy push buttons, I chose a straightforward RC network and Schmitt inverter scheme taken from Jack Ganssle's excellent app note on the subject of debouncing. These digital signals then need to be synchronised to the system clock domain before the control logic can make use of them — otherwise there's no way to guarantee setup and hold times for the latches that hold the machine state — and so they are run through a set of simple D-type flip flops to sample them on clock edges. From there, most of the controls are wired to a second layer of flip-flops and AND gates to generate a single pulse each time the associated button is pressed; in some cases this may be overkill but in general we don't want to execute functions repeatedly for as long as the user is holding a button in!

Counting up the gates required to debounce and synchronise the number of control buttons I anticipate having on the front panel gives me around half a dozen chips used solely for this signal conditioning, which is quite uncomfortable given the amount of logic already in place on the breadboard for the I/O implementation. Moving this conditioning logic onto a daughterboard to free up some space on the front panel control board seemed a sensible idea, but given the mechanical constraints that my backplane imposes on board spacing (as well as the requirement for suitable connectors between the two boards) it seemed impractical. Fearing the worst, and without any features I could identify as obvious candidates for elimination in the cause of slimming the design down, I decided to put the design of the implementation to one side for a while and instead mess around with some ideas for possible front-panel aesthetics.

Some general parameters of the front panel are either fixed or at least fairly firmly established — the panel itself has to fit an existing 19" rack case, for instance, and I've already fabricated some PCBs to suit Omron B3J-series tact switches for control buttons, NKK GW12L toggles for the data input switch bank, and common-or-garden 3mm flat-top LEDs for indicators and data display. These PCBs also establish the spacing between the I/O switches and LEDs, and group the control buttons in sets of three, so those give some basic building blocks to mock up from card and shuffle around the panel that came with the case to see where they might fit both mechanically and logically. As I was doing this it became apparent that some relatively-sensible control layouts would also allow a Eurocard-sized board to be fixed, on appropriate stand offs, behind the control button modules — this board could then hold the signal conditioning circuitry that was looking for a new home and also allow the wiring harness for the entire front panel to be brought together to one point, where a neat ribbon cable could carry it all over to the control logic instead of having a motley bundle of individual connections.

Once this idea took root, suddenly various other chunks of logic suggested themselves as candidates to be moved to this new wiring harness board — first the decoding of the register I/O mode selection rotary switch to the internal view-register/deposit-register/auto-advance signals, then the flip-flops that act as toggles for the hardware breakpoint options, and finally a fairly substantial chunk that generates the 'selection changed' signal to force the selected register to be redisplayed as soon as possible after the user changes the displayed register setting. With that done, the new board will end up carrying a fairly respectable 21 chips amongst its veritable forest of connectors; that should certainly help with squeezing the required logic onto the real controller board on the system backplane.